• DocumentCode
    1544847
  • Title

    Broadband and Low-Loss 1 : 9 Transmission-Line Transformer in 0.18- \\mu\\hbox {m} CMOS Process

  • Author

    Chiou, Hwann-Kaeo ; Liao, Hsein-Yuan

  • Author_Institution
    Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan
  • Volume
    31
  • Issue
    9
  • fYear
    2010
  • Firstpage
    921
  • Lastpage
    923
  • Abstract
    This letter proposes a transmission-line transformer (TLT) with high impedance-transformation ratio of 1 : 9 for wideband power amplifier design. The 1 : 9 TLT is realized with broadside-coupled and multiple-metal stacked transmission lines and achieves a broadband impedance transformation from 5.0 ±0.1Ω optimal load impedance of the power cell to 50-Ω load with a bandwidth of 4.4 to 6.6 GHz, which covers the required bandwidth of the IEEE 802.11a WLAN application. The measured minimum insertion loss is 1.07 dB at 5.8 GHz with a 3-dB bandwidth of 164%. This 1 : 9 TLT is fabricated in standard 0.18-μm CMOS process with a chip area of 426 μm × 589 μm including the test pad.
  • Keywords
    CMOS integrated circuits; power amplifiers; transformers; CMOS process; IEEE 802.11 WLAN application; bandwidth 4.4 GHz to 6.6 GHz; broadband impedance transformation; resistance 50 ohm; size 0.18 mum; transmission-line transformer; wideband power amplifier design; Bandwidth; Broadband amplifiers; High power amplifiers; Impedance; Loss measurement; Power transmission lines; Semiconductor device measurement; Transmission line measurements; Transmission lines; Wireless LAN; Broadband impedance transformation; CMOS; broadside coupled; multiple-metal stacked; power amplifier (PA); transmission-line transformer (TLT);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2010.2053693
  • Filename
    5518370