• DocumentCode
    1545195
  • Title

    An embedded 32-b microprocessor core for low-power and high-performance applications

  • Author

    Clark, Lawrence T. ; Hoffman, Eric J. ; Miller, Jay ; Biyani, Manish ; Liao, Yuyun ; Strazdus, Stephen ; Morrow, Michael ; Velarde, Kimberley E. ; Yarch, Mark A.

  • Author_Institution
    Intel Corp., Chandler, AZ, USA
  • Volume
    36
  • Issue
    11
  • fYear
    2001
  • fDate
    11/1/2001 12:00:00 AM
  • Firstpage
    1599
  • Lastpage
    1608
  • Abstract
    An embedded RISC microprocessor core fabricated in a six-layer metal 0.18-μm CMOS process implementing the ARMTM V.5TE instruction set is described. The core described is the first implementation of the Intel XScale MicroarchitectureTM. The microprocessor core, which includes caches, memory management units, and a bus controller, comprises a hard-embedded block 16.77 mm2 in size. The implementation is primarily custom logic in a variety of circuit styles. The processor dissipates 450 mW at 1.3 V, 600 MHz, and scales between 55 mW at 0.7 V, 200 MHz, and 900 mW at 1.65 V 800 MHz. Architectural performance is 1000 MIPS at 800 MHz with efficiency ranging from over 850 MIPS/W at 1.65 V to over 4500 MIPS/W at 0.75 V. Architectural and circuit design approaches for low power and high performance are described and measured results from the initial implementation are shown. The first implementation VLSI chip has a 3.3-V pin interface and supports a 0.75-1.65-V core voltage range
  • Keywords
    CMOS digital integrated circuits; VLSI; cache storage; instruction sets; low-power electronics; microprocessor chips; pipeline processing; reduced instruction set computing; storage management; 0.18 micron; 0.7 to 1.65 V; 1.3 V; 1000 MIPS; 200 to 800 MHz; 32 bit; 450 mW; 55 to 900 mW; 600 MHz; ARM V.5TE instruction set; Intel XScale Microarchitecture; RISC microprocessor core; VLSI chip; bus controller; caches; core voltage range; embedded microprocessor core; low-power applications; memory management units; six-layer metal CMOS process; CMOS process; Circuit synthesis; Logic circuits; Memory management; Microarchitecture; Microprocessors; Power measurement; Reduced instruction set computing; Semiconductor device measurement; Size control;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.962279
  • Filename
    962279