Title :
A 1.8-GHz instruction window buffer for an out-of-order microprocessor core
Author :
Leenstra, Jens ; Pille, Jürgen ; Müller, Antje ; Sauer, Wolfram M. ; Sautter, Rolf ; Wendel, Dieter F.
Author_Institution :
IBM Deutschland Entwicklund GmbH, Boeblingen, Germany
fDate :
11/1/2001 12:00:00 AM
Abstract :
To address the challenges in microprocessor designs beyond a gigahertz, an instruction window buffer (IWB) was designed. The IWB implements the processor parts for renaming, reservation station, and reorder buffer as a unified buffer. Measured results on an experimental chip demonstrated operation of the IWB macros supporting 1.8 GHz, with the chip being at the fast end of the process distribution. The technology is 0.18-μm CMOS8S bulk technology with seven levels of copper interconnect and a 1.5-V supply voltage
Keywords :
CMOS digital integrated circuits; buffer storage; high-speed integrated circuits; integrated circuit design; microprocessor chips; 0.18 micron; 1.5 V; 1.8 GHz; CMOS8S bulk technology; IWB macros; copper interconnect levels; instruction window buffer; out-of-order microprocessor core; process distribution; renaming; reorder buffer; reservation station; supply voltage; CMOS technology; Copper; High speed integrated circuits; Integrated circuit interconnections; Integrated circuit measurements; Integrated circuit technology; Microarchitecture; Microprocessors; Out of order; Semiconductor device measurement;
Journal_Title :
Solid-State Circuits, IEEE Journal of
