Title :
A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOS
Author :
Yang, Chih-Kong Ken ; Stojanovic, Vladimir ; Modjtahedi, Siamak ; Horowitz, Mark A. ; Ellersick, William F.
Author_Institution :
California Univ., Los Angeles, CA, USA
fDate :
11/1/2001 12:00:00 AM
Abstract :
This paper presents a transceiver that uses a 4-bit flash analog-to-digital converter (ADC) for the receiver and an 8-bit current-steering digital-to-analog converter (DAC) for the transmitter. The 8-GSamples/s converters are 8-way time interleaved. Digital compensation reduces the input offset of the ADC comparators to less than 0.6 LSB, improves the accuracy of the interleaved sampling clocks to within 10 ps, and reduces systematic coupling noise to less than 18 mV on the 800-mV signal swing. 1.1-nH bondwire inductors distribute the parasitic capacitances at the transceiver input and output, reducing attenuation by 10 dB at 4 GHz. Equalization algorithms using the converters compensate for the 1.5-GHz transceiver bandwidth to allow 8-GSamples/s multilevel data transmission
Keywords :
CMOS integrated circuits; analogue-digital conversion; coaxial cables; data communication equipment; digital-analogue conversion; equalisers; transceivers; wiring; 0.25 micron; 1.5 GHz; 4 bit; 8 bit; A/D converters; CMOS; D/A converters; bondwire inductors; current-steering digital-to-analog converter; digital compensation; equalization algorithms; flash analog-to-digital converter; input offset; interleaved sampling clocks; multilevel data transmission; parasitic capacitances; serial-link transceiver; systematic coupling noise; time interleaved; transceiver bandwidth; Analog-digital conversion; Bonding; Clocks; Digital-analog conversion; Inductors; Noise reduction; Parasitic capacitance; Sampling methods; Transceivers; Transmitters;
Journal_Title :
Solid-State Circuits, IEEE Journal of
