DocumentCode
1545318
Title
Parasitic capacitance of submicrometer MOSFET´s
Author
Suzuki, Kunihro
Author_Institution
Fujitsu Labs. Ltd., Atsugi, Japan
Volume
46
Issue
9
fYear
1999
fDate
9/1/1999 12:00:00 AM
Firstpage
1895
Lastpage
1900
Abstract
We systematically investigated the dependence of parasitic capacitance on gate length, gate electrode thickness, and gate oxide thickness using a 2-D device simulator. We showed that the model commonly used for parasitic capacitance is not accurate and also showed that more the rigorous model proposed by Kamchouchi should be used for submicrometer devices. Furthermore, we proposed a simple model that ensures the same accuracy as that of the Kamchouchi model
Keywords
MOSFET; capacitance; semiconductor device models; 2D device simulation; Kamchouchi model; parasitic capacitance; submicrometer MOSFET; Analytical models; Boundary conditions; Conductors; Conformal mapping; Electrodes; Geometry; MOSFET circuits; Mathematical model; Parasitic capacitance; Predictive models;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.784191
Filename
784191
Link To Document