Title :
A 3
3.8 Gb/s Four-Wire High Speed I/O Link Based on CDMA-Like Crosstalk Cancellation
Author :
Hsueh, Tzu-Chien ; Su, Pin-En ; Pamarti, Sudhakar
Author_Institution :
Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA
Abstract :
Code division multiple access (CDMA) principles have been shown to suppress the signal crosstalk caused by inevitable circuit and transmission-line mismatches in a four-wire chip-to-chip electrical signaling system. This paper describes the CDMA-like crosstalk cancellation technique, and discusses equalization and clocking issues in the four-wire simultaneous differential- and common-mode signaling system based on the technique. The implementation and measurement of a 3 × 3.8 Gb/s, 10-12 BER, prototype IC built in a standard 90 nm CMOS technology are also described as a proof of concept.
Keywords :
CMOS integrated circuits; code division multiple access; crosstalk; equalisers; integrated circuit interconnections; interference suppression; microprocessor chips; radiofrequency interference; telecommunication signalling; CDMA-like crosstalk cancellation; CMOS technology; chip-to-chip interconnections; clocking; code division multiple access; common-mode signaling system; differential-mode signaling system; equalization; four-wire chip-to-chip electrical signaling system; four-wire high speed I/O link; signal crosstalk suppression; size 90 nm; transmission-line mismatch; Bit error rate; CMOS technology; Circuits; Clocks; Communication system signaling; Crosstalk; Multiaccess communication; Prototypes; Semiconductor device measurement; Transmission lines; CDMA; chip-to-chip interconnections; common-mode signaling; crosstalk; four-wire signaling; high-speed serial links; interference; mode conversion; spread spectrum;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2010.2048136