Title :
Complementary Josephson Junction circuits
Author :
Terzioglu, E. ; Gupta, D. ; Beasley, M.R.
Author_Institution :
Edward L. Ginzton Lab., Stanford Univ., CA, USA
fDate :
6/1/1997 12:00:00 AM
Abstract :
We present simple Complementary Josephson Junction circuits using 1 kA/cm/sup 2/ Nb junctions. We use long, sine-shaped junctions in order to achieve gain and suppressed side lobes. We have simulated layout-extracted simple inverter and ring oscillator circuits to evaluate the performance of these circuits in 1 kA/cm/sup 2/ technology. Projected gate delays with possible higher critical current density technologies are also simulated. We have experimentally tested the operation of inverter circuits.
Keywords :
SPICE; circuit analysis computing; critical current density (superconductivity); delays; logic gates; superconducting device testing; superconducting logic circuits; JSPICE simulation; Nb; Nb junctions; complementary Josephson junction circuits; gate delays; high critical current density technologies; inverter circuit testing; layout-extracted simple inverter circuits; long sine-shaped junctions; ring oscillator circuits; simulation; suppressed side lobes; Brain modeling; Circuit simulation; Circuit testing; Frequency; Inverters; Josephson junctions; Numerical models; Resistors; Ring oscillators; Voltage;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
