DocumentCode
1545975
Title
Tunable floating active inductor with internal offset reduction
Author
Nagel, Ira ; Fabre, L. ; Pastre, Marc ; Krummenacher, Francois ; Cherkaoui, R. ; Kayal, Maher
Author_Institution
Electron. Lab. & Power Syst. Lab., Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
Volume
48
Issue
13
fYear
2012
Firstpage
786
Lastpage
788
Abstract
Presented is a transistor-level implementation of a floating and tunable CMOS active inductor. It is based on the classical gyrator-C topology and is enhanced by adding an internal offset reduction mechanism to guarantee functionality also for unbalanced DC conditions. The realised inductance can be programmed for values between 685 μH and 12.4 mH and is designed to be implemented using standard CMOS technology. Its range of operation is from 250 to 750 kHz and the inductor consumption does not exceed 2 mW.
Keywords
CMOS integrated circuits; inductance; inductors; floating CMOS active inductor; frequency 250 kHz to 750 kHz; gyrator-C topology; inductor consumption; internal offset reduction; standard CMOS technology; transistor-level implementation; tunable CMOS active inductor; tunable floating active inductor; unbalanced DC condition;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2012.1015
Filename
6222104
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