Title :
1-1-1 MASH
Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping
Author :
Cao, Ying ; De Cock, Wouter ; Steyaert, Michiel ; Leroux, Paul
Author_Institution :
MICAS Div., ESAT, Leuven, Belgium
Abstract :
Two 1-1-1 MASH ΔΣ time-to-digital converters (TDCs) are presented in this paper. Third-order time domain noise-shaping has been adopted by the TDCs to achieve better than 6 ps resolution. Following a detailed analysis of the noise generation and propagation in the MASH ΔΣ structure, the first prototyping TDC has been realized in 0.13 μm CMOS technology. It achieves an ENOB of 11 bits and consumes 1.7 mW from a 1.2 V supply. In the second MASH TDC, a delay-line assisted calibration technique is introduced to mitigate the phase skew caused by the large comparator delay, which is the main limiting factor of the MASH TDC´s resolution. The demonstrated TDC achieves an ENOB of 13 bits and a wide input range of 100 ns. This TDC shows a temperature coefficient of 176 ppm°C within a temperature range of -20 to 120°C. It consumes only 0.7 mW and occupies 0.08 mm2 area (core).
Keywords :
CMOS integrated circuits; delay lines; delta-sigma modulation; time-digital conversion; 1-1-1 MASH ΔΣ time-to-digital converters; CMOS technology; delay-line assisted calibration technique; large comparator delay; limiting factor; noise generation; noise propagation; phase skew; power 0.7 mW; power 1.7 mW; size 0.13 mum; temperature -20 C to 120 C; third-order time domain noise-shaping; time 100 ns; time 6 ps; voltage 1.2 V; word length 11 bit; word length 13 bit; Clocks; Jitter; Multi-stage noise shaping; Noise; Oscillators; Quantization; Delay-line assisted calibration; MASH; delta-sigma; noise-shaping; temperature-stable; time-to-digital converter;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2012.2199530