Title :
Packaging properties of ALIVH-CSP using SBB flip-chip bonding technology
Author :
Itagaki, Minehiro ; Amami, Kazuyoshi ; Tomura, Yoshihiro ; Yuhaku, Satoru ; Ishimaru, Yukihiro ; Bessho, Yoshihiro ; Eda, Kazuo ; Ishida, Toru
Author_Institution :
Device Eng. Dev. Center, Matsushita Electr. Ind. Co. Ltd., Osaka, Japan
fDate :
8/1/1999 12:00:00 AM
Abstract :
A new chip scale package (CSP) using an organic laminated substrate called μCSP was developed, which was fabricated using ALIVH substrate as a interposer and stud-bump-bonding (SBB) flip-chip technology. The ALIVH substrate is a multilayered organic substrate with inner via holes in any layer. The newly developed CSP-L using ALIVH substrate realized a miniaturization of its package size to the same as a CSP using a ceramic substrate (CSP-C). In order to perform the SBB flip-chip bonding onto the ALIVH substrate, an excellent coplanarity of the substrate surface was required. The required coplanarity was obtained using a fixture during the SBB flip-chip bonding process. The first-level packaging reliability and the second-level packaging reliability onto ALIVH mother board were evaluated. The resulting reliabilities were good enough to apply to practical use
Keywords :
chip scale packaging; flip-chip devices; integrated circuit reliability; ALIVH-CSP; SBB flip-chip bonding technology; chip scale package; coplanarity; first-level packaging reliability; inner via holes; multilayered organic substrate; organic laminated substrate; packaging properties; second-level packaging reliability; stud-bump-bonding; Bonding; Ceramics; Chip scale packaging; Costs; Electronics packaging; Fabrication; Large scale integration; Semiconductor device packaging; Substrates; Thermal stresses;
Journal_Title :
Advanced Packaging, IEEE Transactions on
DOI :
10.1109/6040.784487