Title :
Testing of Stuck-Open Faults in Nanometer Technologies
Author :
Champac, Victor ; Hernández, Julio Vázquez ; Barceló, Salvador ; Gomez, Roberto ; Hawkins, Chuck ; Segura, Jaume
Author_Institution :
Dept. of Electron. Eng., Inst. Nac. de Astrofis., Opt. y Electron. (INAOE), Puebla, Mexico
Abstract :
Failure analysis and fault modeling of integrated circuits have always been fields that require continuous revision and update as manufacturing processes evolve. This paper discusses the new face of the well-known transistor stuck-open fault model in modern nanometer technologies and proposes new detection methods that improve the robustness of tests.
Keywords :
failure analysis; fault diagnosis; integrated circuit reliability; detection methods; failure analysis; fault modeling; integrated circuits; manufacturing processes; nanometer technologies; stuck-open faults testing; transistor stuck-open fault model; Circuit faults; FinFETs; Impedance; Leakage current; Logic gates; Nanometers; FinFET; High-K; Leakage Currents; Nanometer Technologies; Opens; Stuck-Open Fault; Test; Test Conditions;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2012.2205609
