A switched-capacitor interface for differential capacitance transducers

Author

Ogawa, Satomi ; Oisugi, Yutaka ; Mochizuki, Kouji ; Watanabe, Kenzo

Author_Institution

Res. Inst. of Electron., Shizuoka Univ., Hamamatsu, Japan

Volume

50

Issue

5

fYear

2001

fDate

10/1/2001 12:00:00 AM

Firstpage

1296

Lastpage

1301

Abstract

For high-accuracy signal processing of differential capacitance transducers, interface circuitry based on a switched-capacitor (SC) sample/hold (S/H) circuit is developed. Driven by nonoverlapping two-phase clocks, the interface produces the output voltage which is proportional to the ratio of difference-to-sum of two capacitors of a differential transducer. Performances of a prototype chip fabricated using 0.6-μm n-well CMOS process were measured and compared with those simulated by HSPICE. The measured results indicate that 0.1% resolution is achievable with the proposed interface and the temperature-dependence of the interface is small. An interface circuit improved for smaller temperature-dependence is also proposed and its operation is confirmed experimentally

Keywords

CMOS analogue integrated circuits; SPICE; capacitive sensors; equivalent circuits; sample and hold circuits; signal processing equipment; switched capacitor networks; HSPICE; differential capacitance transducer; double sampling; equivalent circuit; high-accuracy signal processing; n-well CMOS process; nonoverlapping two-phase clocks; prototype chip; ratiometric signal processing; smaller temperature-dependence; switched-capacitor interface; switched-capacitor sample/hold circuit; Capacitance; Capacitors; Clocks; Performance evaluation; Semiconductor device measurement; Signal processing; Switching circuits; Transducers; Virtual prototyping; Voltage;

fLanguage

English

Journal_Title

Instrumentation and Measurement, IEEE Transactions on

Publisher

ieee

ISSN

0018-9456

Type

jour

DOI

10.1109/19.963200

Filename

963200