Title :
High room temperature peak-to-valley current ratio in Si based Esaki diodes
Author :
Duschl, R. ; Schmidt, O.G. ; Reitemann, G. ; Kasper, E. ; Eberl, K.
Author_Institution :
Max-Planck-Inst. fur Festkorperforschung, Stuttgart, Germany
fDate :
6/24/1999 12:00:00 AM
Abstract :
Room temperature (RT) I-V characteristics of epitaxially grown Si-SiGe-Si p/sup +//n/sup +/ Esaki diodes are presented. The incorporation of Ge within the intrinsic (i) zone gives rise to an increased peak current density (j/sub P/=3kA/cm/sup 2/) and peak-to-valley current ratio (PVCR) compared to pure Si structures (j/sub P/=80 A/cm/sup 2/). A detailed investigation and optimisation of post-growth annealing has demonstrated a record PVCR of 4.2 for Si based Esaki diodes.
Keywords :
silicon; MBE growth; Si based Esaki diodes; Si-SiGe-Si; epitaxially grown Si/SiGe/Si structure; high room temperature; p/sup +//n/sup +/ Esaki diodes; peak current density; peak-to-valley current ratio; post-growth annealing; room temperature I-V characteristics;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19990728
