Title :
Improved programming performance of EEPROM/flash cell using post-poly-Si gate N/sub 2/O annealing
Author :
Huang, Kuo-Ching ; Fang, Yean-Kuen ; Yaung, Dun-Nian ; Kuo, Dison ; Wang, Chung S. ; Liang, Mong-Song
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fDate :
6/24/1999 12:00:00 AM
Abstract :
The effect of post poly-Si N/sub 2/O annealing on the programming performance and reliability of split-gate source-side-injection EEPROM/flash memory cells has been investigated. It is found that by employing post-poly-Si gate N/sub 2/O annealing, the programming efficiency and the immunity to program disturbances can be significantly improved.
Keywords :
flash memories; EEPROM/flash cell; N/sub 2/O; N/sub 2/O annealing; Si; polysilicon gate; post-poly-Si gate annealing; program disturbances immunity; programming efficiency; programming performance improvement; reliability; source-side-injection memory cells; split-gate memory cells;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19990711
