Title :
0.18-μm fully-depleted silicon-on-insulator MOSFET´s
Author :
Min Cao ; Kamins, T. ; Voorde, P.V. ; Diaz, C. ; Greene, W.
Author_Institution :
Hewlett-Packard Labs., Palo Alto, CA, USA
fDate :
6/1/1997 12:00:00 AM
Abstract :
High-performance 0.18-μm gate-length fully depleted silicon-on-insulator (FD-SOI) MOSFET´s were fabricated using 4-nm gate oxide, 35-nm thick channel, and 80-nm or 150-nm buried oxide layer. An elevated source/drain structure was used to provide extra silicon during silicide formation, resulting in low source/drain series resistance. Nominal device drive currents of 560 μA/μm and 340 μA/μm were achieved for n-channel and p-channel devices, respectively, at a supply voltage of 1.8 V. Improved short-channel performance and reduced self-heating were observed for devices with thinner buried oxide layers.
Keywords :
MOSFET; SIMOX; buried layers; characteristics measurement; semiconductor technology; 0.18 mum; 0.18-/spl mu/m gate-length; 1.8 V; 150 nm; 35 nm; 4 nm; 80 nm; I-V characteristics; SIMOX wafers; Si-SiO/sub 2/; buried oxide layer; drive currents; elevated source/drain structure; fully depleted SOI MOSFET; gate oxide; low source/drain series resistance; n-channel devices; p-channel devices; reduced self-heating; short-channel performance; silicide formation; subthreshold characteristics; supply voltage; Degradation; Implants; Laboratories; MOSFET circuits; Optical films; Process design; Semiconductor films; Silicides; Silicon on insulator technology; Threshold voltage;
Journal_Title :
Electron Device Letters, IEEE
