Title :
A novel self-aligned polycrystalline silicon thin-film transistor using silicide layers
Author :
Jai Il Ryu ; Hyun Churl Kim ; Sung Ki Kim ; Jin Jang
Author_Institution :
Dept. of Phys., Kyung Hee Univ., Seoul, South Korea
fDate :
6/1/1997 12:00:00 AM
Abstract :
A novel self-aligned polycrystalline silicon (poly-Si) thin-film transistor (TFT) was fabricated using the three layers of poly-Si, silicon-nitride, and thin amorphous silicon. Gate and source/drain silicide formation was carried out simultaneously following silicon nitride and amorphous silicon patterning, enabling the use of only two mask steps for the TFT. The fabricated poly-Si TFT using laser annealed poly-Si exhibited a field-effect mobility of 30.6 cm2/Vs, threshold voltage of 0.5 V, subthreshold slope of 1.9 V/dec., on/off current ratio of /spl sim/106, and off-state leakage current of 7.88×10/sup -12/ A/μm at the drain voltage of 5 V and gate voltage of -10 V.
Keywords :
carrier mobility; elemental semiconductors; laser beam annealing; leakage currents; semiconductor technology; silicon; thin film transistors; -10 V; 0.5 V; 5 V; NiSi; Si-SiN-Si; drain voltage; field-effect mobility; gate silicide formation; gate voltage; laser annealed poly-Si; mask steps; off-state leakage current; on/off current ratio; self-aligned polycrystalline silicon thin-film transistor; self-aligned polysilicon TFT; silicide layers; source/drain silicide formation; subthreshold slope; threshold voltage; Active matrix liquid crystal displays; Amorphous silicon; Annealing; Doping; Insulation; Leakage current; Silicides; Silicon compounds; Thin film transistors; Threshold voltage;
Journal_Title :
Electron Device Letters, IEEE
