Room temperature operation of a quantum-dot flash memory

Author

Welser, J.J. ; Tiwari, S. ; Rishton, S. ; Lee, K.Y. ; Lee, Y.

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

18

Issue

6

fYear

1997

fDate

6/1/1997 12:00:00 AM

Firstpage

278

Lastpage

280

Abstract

A flash-memory device has been fabricated and demonstrated at room temperature by coupling a self-aligned, sub-50-nm quantum dot to the channel of a transistor on a silicon-on-insulator (SOI) substrate. Large threshold voltage shifts of up to 0.75 V are obtained for small erase/write voltages (13 V) at room temperature. At 90 K, evidence of single electron storage is observed. The small size of this device is attractive for achieving high packing densities, while the relatively large output current (100 nA-μA´s), low off-state current (10 pA), and simple fabrication, requiring only minor variations in standard processing, make it suitable for integration with current silicon memory and logic technology.

Keywords

nanotechnology; quantum interference devices; semiconductor quantum dots; semiconductor storage; silicon-on-insulator; 1 to 30 nm; 10 pA; 100 nA to 1 muA; 3 V; 300 K; 90 K; SOI substrate; erase/write voltages; high packing densities; integration suitability; low off-state current; output current; quantum-dot flash memory; room temperature operation; self-aligned quantum dot coupling; single electron storage; threshold voltage shifts; transistor channel; Capacitance; Electrons; Etching; Flash memory; Logic devices; Quantum dots; Silicon; Temperature; Thickness control; Threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.585357

Filename

585357