Title :
A compact-charge LDD-MOSFET model
Author_Institution :
Siemens AG, Munich, Germany
fDate :
9/1/1997 12:00:00 AM
Abstract :
A compact-charge LDD-MOSFET model, based on an analytical surface potential formulation at source and drain has been derived and implemented in the circuit simulator SABER for all channel length and width down to deep submicrometer. Besides well-known short- and narrow-channel effects, the model includes additional charge effects around the threshold voltage as well as a bias dependent charge description of the overlap LDD(S)-region. These additional capacitance effects are not considered in conventional submicrometer transistor models although they domain the capacitance characteristic with further downscaling. If not taken into account, simulation errors of, e.g., up to 50% in the frequency of a 0.3 μm CMOS ring oscillator or over 100% in the 3 dB critical frequency of amplifier circuits can result
Keywords :
MOS integrated circuits; MOSFET; circuit analysis computing; integrated circuit design; semiconductor device models; surface potential; 0.3 micron; SABER; analytical surface potential formulation; bias dependent charge description; capacitance characteristic; channel length; channel width; circuit simulator; compact-charge LDD-MOSFET model; narrow-channel effects; short-channel effects; simulation errors; Analytical models; Capacitance; Capacitance-voltage characteristics; Circuit simulation; Computational modeling; Frequency; Ring oscillators; Semiconductor device modeling; Semiconductor process modeling; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on