Margins and yield in superconducting circuits with gain

We analyze the relationship between current gain and circuit critical current margins in prototype vortex flow transistor (VFT) circuits. We give a brief review of the relationship between process spread, circuit margins, and yield. We note that modest increases in gain could dramatically improve yield. In some of the circuits previously proposed, however, there is a limit to the gain that can be used if proper operation is to be ensured. We introduce alternative approaches to superconducting digital logic families that overcome this limitation in useful gain.