Some practical concerns on isothermal electromigration tests

The isothermal electromigration (EM) test at wafer level can greatly reduce the test time from months to minutes. This plausible feature makes inline reliability monitoring a promising approach to enhance product reliability. Although most wafer-level reliability (WLR) tests are applied for process monitors and comparisons, their applicability for qualification will be justified. The correlation between package-level reliability (PLR) and the isothermal EM is necessary and is discussed in this paper. Besides failure analysis, a 95% confidence interval of activation energy is constructed. Since the sizes of voids formed at isothermal EM are much smaller than those at PLR EM tests, the failure criterion should be changed (i.e., using a smaller OR). Issues for better test structure designs are described and verified. Generally, the straight-line test structure with four pads is recommended for the isothermal EM tests because of the uniform temperature profile. An extensive example is provided to illustrate the procedures on isothermal EM tests for WLR control. In the example, we propose using t₅₀ for routine Cpk review and the slope of the fitting line to monitor the degradation. The spec limits can be obtained based on customers´ or internal reliability goals