Title :
250 mW 2.488 Gbit/s and 622 Mbit/s SONET/SDH bit-error-monitoring LSI
Author :
Kawai, K. ; Ichino, H.
Author_Institution :
NTT Photonic Network Lab., Kanagawa, Japan
fDate :
5/27/1999 12:00:00 AM
Abstract :
A bit-error-monitoring LSI for 2.488 Gbit/s and 622 Mbit/s SONET/SDH frames is presented for transparent optical networks. A new architecture specific to the monitoring LSI is adopted and low power bipolar LSI design techniques are used to achieve 250 mW power consumption and a 9.6 mm-square package.
Keywords :
SONET; 2.488 Gbit/s; 250 mW; 622 Mbit/s; SONET/SDH bit-error-monitoring LSI; low power bipolar LSI design techniques; monitoring LSI; power consumption; transparent optical networks;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19990649
