Title :
Contactless Test of IC Pads, Pins, and TSVs via Standard Boundary Scan
Author :
Sunter, Sedat ; Roy, Anirban
Author_Institution :
Mentor Graphics, Ottawa, ON, Canada
Abstract :
The performance of an IC´s inputs and outputs (I/Os) is always specified in IC data sheets and is the performance most likely to be affected by assembly steps. As the speed and number of I/Os increase beyond low-cost ATE capabilities, and I/O pads become smaller (less than 10 microns wide for 3D assemblies), built-in self-test (BIST) of this performance becomes more attractive. This article describes a BIST that exploits relatively low-speed IEEE 1149.1 boundary scan to access the I/Os and test performance with as low as 5 ps calibrated resolution, equivalent to a bandwidth approaching 100 GHz.
Keywords :
boundary scan testing; built-in self test; integrated circuit testing; three-dimensional integrated circuits; IC data sheets; IEEE 1149.1 boundary scan; TSV; built-in self-test; contactless test; integrated circuit pad; integrated circuit pins; standard boundary scan; Built-in self-test; Clocks; Delays; Input variables; Integrated circuits; Parameter estimation; Radiation detectors; DFT; I/O test; Parametric BIST; delay test; high-speed I/O test;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2012.2206363
