High-efficiency harmonic loaded oscillator with low bias using a nonlinear design approach

Author

Lee, Moon-Que ; Yi, Seung-June ; Nam, Sangwook ; Kwon, Youngwoo ; Yeom, Kyung-Whan

Author_Institution

Dept. of Satellite Commun. Syst., Electron. & Telecommun. Res. Inst., Taejon, South Korea

Volume

47

Issue

9

fYear

1999

fDate

9/1/1999 12:00:00 AM

Firstpage

1670

Lastpage

1679

Abstract

We present a design method for an optimized high-efficiency harmonic loaded oscillator. The proposed approach predicts the performance of oscillators including output power, dc-RF conversion efficiency, and dc-bias current shift during start-up transition. In this method, the performance of the oscillator can he optimized based on the performance analysis of the active device under the assumed operation conditions. The effects of fundamental and harmonic loading on output power and efficiency are investigated by the proposed approach. Two kinds of stability conditions are addressed for an oscillator initially biased at a low gate voltage. Using the proposed approach, we design an oscillator that has a high efficiency of 61% at 1.86 GHz with a very low bias voltage of 2.0 V

Keywords

UHF oscillators; circuit stability; harmonic oscillators (circuits); nonlinear network synthesis; 1.86 GHz; 2.0 V; 61 percent; DC bias current; DC-RF conversion efficiency; harmonic loaded oscillator; load line; nonlinear design; output power; stability; start-up transition; Design automation; Design methodology; Frequency; Low voltage; Microwave devices; Microwave oscillators; Power generation; Power system harmonics; Stability; Voltage-controlled oscillators;

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/22.788608

Filename

788608