DocumentCode :
1553840
Title :
A 88-dB DR, 84-dB SNDR Very Low-Power Single Op-Amp Third-Order 
Modulator
Author :
Peña-Perez, Aldo ; Bonizzoni, Edoardo ; Maloberti, Franco
Author_Institution :
Dept. of Electron., Univ. of Pavia, Pavia, Italy
Volume :
47
Issue :
9
fYear :
2012
Firstpage :
2107
Lastpage :
2118
Abstract :
A low-power switched-capacitor third-order sigma- delta (ΣΔ) modulator suitable for portable sensor systems is described. The architecture uses only one operational amplifier working in a time-interleaved fashion. The architecture employs swing reduction techniques to limit the swing and the slew-rate requirements of all internal nodes. Realized in a 0.18-μm 2P6M CMOS technology, the modulator provides 84-dB SNDR and 88-dB dynamic range in a signal bandwidth of 100 kHz and clock at 3.2 MHz. The 1.5-V supplied prototype dissipates 140 μW with a FoM of 54 fJ/conversion-level.
Keywords :
CMOS integrated circuits; low-power electronics; operational amplifiers; sigma-delta modulation; CMOS technology; SNDR; low-power switched-capacitor; operational amplifier; portable sensor systems; third-order ΣΔ modulator; very low-power single op-amp; Ash; Bandwidth; Capacitors; Modulation; Noise; Noise shaping; Quantization; Analog–digital conversion; mixed analog–digital integrated circuits; noise shaping; operational amplifier; sigma-delta $(Sigma Delta)$
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2012.2199669
Filename :
6232471
Link To Document :
