DocumentCode :
1554263
Title :
A binary link tracker for the BABAR level 1 trigger system
Author :
Berenyi, A. ; Chen, H.K. ; Dao, K. ; Dow, S.F. ; Gehrig, S.K. ; Gill, M.S. ; Grace, C. ; Jared, R.C. ; Johnson, J.K. ; Karcher, A. ; Kasen, D. ; Kirsten, EA ; Kral, J.F. ; LeClerc, C.M. ; Levi, M.E. ; Lippe, H. Vonder ; Liu, T.H. ; Marks, K.M. ; Meyer, A.
Author_Institution :
Lawrence Berkeley Nat. Lab., Berkeley, CA, USA
Volume :
46
Issue :
4
fYear :
1999
fDate :
8/1/1999 12:00:00 AM
Firstpage :
928
Lastpage :
932
Abstract :
The BABAR detector at PEP-II will operate in a high-luminosity e +e- collider environment near the ϒ(4S) resonance with the primary goal of studying CP violation in the B meson system. In this environment, typical physics events of interest involve multiple charged particles. These events are identified by counting these tracks in a fast first level (Level 1) trigger system, by reconstructing the tracks in “real time”. For this purpose, a Binary Link Tracker Module (BLTM) was designed and fabricated for the BABAR Level 1 Drift Chamber trigger system. The BLTM is responsible for linking track segments, constructed by the Track Segment Finder Modules (TSFM), into complete tracks. A single BLTM module processes a 360 MBytes/s stream of segment hit data, corresponding to information from the entire Drift Chamber, and implements a fast and robust algorithm that tolerates high hit occupancies as well as local inefficiencies of the Drift Chamber. The algorithms and the necessary control logic of the BLTM were implemented in Field Programmable Gate Arrays (FPGAs), using the VHDL hardware description language. The finished 9U×400 mm Euro-format board contains roughly 75,000 gates of programmable logic or about 10,000 lines of VHDL code synthesized into five FPGAs
Keywords :
drift chambers; field programmable gate arrays; hardware description languages; nuclear electronics; trigger circuits; B meson system; BABAR Level 1 Drift Chamber trigger system; BABAR level 1 trigger system; CP violation; Euro-format board; Field Programmable Gate Arrays; PEP-II; Track Segment Finder Modules; VHDL hardware description language; binary link tracker; high hit occupancies; multiple charged particles; Detectors; Field programmable gate arrays; Hardware design languages; Joining processes; Mesons; Physics; Programmable control; Programmable logic arrays; Resonance; Robustness;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.790706
Filename :
790706
Link To Document :
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