DocumentCode
1554289
Title
Design and performance of robust embedded ADPCM coder
Author
Zhang, Zhenhao ; Lockhart, G.B.
Author_Institution
Leeds Univ., UK
Volume
27
Issue
20
fYear
1991
Firstpage
1786
Lastpage
1788
Abstract
An embedded adaptive DPCM (EADPCM) speech coder is described which allows bit rate reductions to be achieved by progressive deletion of bits from output codewords. Optimised step size multipliers are given for a robust implementation using an improved algorithm for adaptive quantisation. Simulation shows that a graceful reduction in speech quality with bit rate is achieved in the range 16-48 kbit/s.
Keywords
data compression; digital communication systems; encoding; pulse-code modulation; speech analysis and processing; 16 to 48 kbit/s; adaptive quantisation; bit rate reductions; embedded ADPCM coder; graceful reduction in speech quality; performance; progressive deletion of bits; robust implementation; speech coder; step size multipliers;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19911111
Filename
97177
Link To Document