• DocumentCode
    1554658
  • Title

    Salicidation process for submicrometre gate MOSFET fabrication using a resistless electron beam lithography process

  • Author

    Michel, S. ; Lavallée, E. ; Beauvais, J. ; Mouine, J.

  • Author_Institution
    Dept. de Genie Electr., Sherbrooke Univ., Que., Canada
  • Volume
    35
  • Issue
    15
  • fYear
    1999
  • fDate
    7/22/1999 12:00:00 AM
  • Firstpage
    1283
  • Lastpage
    1284
  • Abstract
    Recently, a novel silicide direct write electron beam lithography (SiDWEL) process has been developed in order to achieve high resolution (50 nm) silicide structures without the need for any supplementary annealing step. This new lithography technique is used to fabricate N-type MOSFET devices with platinum silicide gates. The fabrication uses a mix and match approach to combine the SiDWEL process with conventional MOSFET fabrication techniques
  • Keywords
    MOSFET; electron beam lithography; semiconductor device metallisation; 50 nm; N-type MOSFET; Pt2Si; fabrication; salicidation; silicide direct write electron beam lithography; submicron gate;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19990817
  • Filename
    790814
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1554658