DocumentCode
1555224
Title
Efficient Digital Implementation of Extreme Learning Machines for Classification
Author
Decherchi, Sergio ; Gastaldo, Paolo ; Leoncini, Alessio ; Zunino, Rodolfo
Author_Institution
Department Drug Discovery and Development, Fondazione Istituto Italiano di Tecnologia (IIT), Genova, Italy
Volume
59
Issue
8
fYear
2012
Firstpage
496
Lastpage
500
Abstract
The availability of compact fast circuitry for the support of artificial neural systems is a long-standing and critical requirement for many important applications. This brief addresses the implementation of the powerful extreme learning machine (ELM) model on reconfigurable digital hardware (HW). The design strategy first provides a training procedure for ELMs, which effectively trades off prediction accuracy and network complexity. This, in turn, facilitates the optimization of HW resources. Finally, this brief describes and analyzes two implementation approaches: one involving field-programmable gate array devices and one embedding low-cost low-performance devices such as complex programmable logic devices. Experimental results show that, in both cases, the design approach yields efficient digital architectures with satisfactory performances and limited costs.
Keywords
Computer architecture; Cost function; Feeds; Field programmable gate arrays; Neurons; Training; Vectors; Complex programmable logic device (CPLD); extreme learning machine (ELM); field-programmable gate array (FPGA); hardware (HW) neural networks (NNs);
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2012.2204112
Filename
6236105
Link To Document