A dual gate flash EEPROM cell with two-bit storage capacity

Author

Lorenzini, Martino ; Rudan, Massimo V. ; Baccarani, Giorgio

Author_Institution

Dipartimento di Elettronica Inf. e Sistemistica, Bologna Univ., Italy

Volume

20

Issue

2

fYear

1997

fDate

6/1/1997 12:00:00 AM

Firstpage

182

Lastpage

189

Abstract

In this paper, a dual-gate Flash EEPROM cell is proposed which allows the storage of two bits with only a slight increase in the cell size with respect to the single-bit case. Extensive simulations show that the basic functions of the Flash cell, namely reading, programming and erasing are possible with a suitable setting of the applied voltages. A simplified model based on the equivalent circuit of the cell allows for a qualitative interpretation of the obtained results, providing at the same time useful hints for the optimization of the cell parameters. Moreover, a schematic of the cell array is presented and some issues related to the array organization are briefly discussed

Keywords

EPROM; equivalent circuits; integrated memory circuits; dual gate flash EEPROM cell; equivalent circuit model; multilevel charge storage; nonvolatile memory; simulation; two-bit storage capacity; Circuit simulation; EPROM; Equivalent circuits; Functional programming; Nonvolatile memory; Numerical simulation; Secondary generated hot electron injection; Threshold voltage; Tunneling; Voltage control;

fLanguage

English

Journal_Title

Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on

Publisher

ieee

ISSN

1070-9886

Type

jour

DOI

10.1109/95.588572

Filename

588572