Analysis of a static transfer switch with respect to transfer time

Thyristor-based static transfer switches (STSs) are used in uninterruptible power supply systems and in distribution networks to provide connection to alternate sources of AC power for critical loads when the main sources fail. However, performance of STSs from a transfer-time point of view has not been reported in the technical literature. This performance evaluation is a complex issue due to the dependence of the transfer time on gating scheme and commutation between thyristors. This paper provides a thorough analysis of a fast gating strategy for STS systems. It derives analytical expressions to estimate the transfer time for different operating conditions and identifies the worst case scenario(s) in which maximum transfer time occurs. The analytical results are validated based on time-domain simulation studies using a PSCAD/EMTDC package for a medium-voltage system. The simulation results are verified based on comparison with those obtained from an experimental setup