140–220 GHz SPST and SPDT Switches in 45 nm CMOS SOI

Author

Uzunkol, Mehmet ; Rebeiz, Gabriel M.

Author_Institution

Electr. & Comput. Eng. Dept., Univ. of California San Diego, La Jolla, CA, USA

Volume

22

Issue

8

fYear

2012

Firstpage

412

Lastpage

414

Abstract

This letter presents 140-220 GHz single-pole single-throw (SPST) and single-pole double-throw (SPDT) switches built using 45 nm semiconductor-on-insulator (SOI) CMOS technology. A tuned-shunt topology is used to minimize the insertion loss, and the transistor layout results in very low ground inductance and high isolation. The double-shunt SPST switch results in an insertion loss of 1.0 dB and an isolation of 20 dB, while the SPDT switches result in an insertion loss of 3.0 dB and an isolation of 20-25 dB, all at 180 GHz. The switches are well matched with a return loss at all ports greater than 10 dB at 140-220 GHz. The work shows that advanced CMOS nodes can be used for transmit-receive switches in emerging 140-220 GHz CMOS systems.

Keywords

CMOS integrated circuits; field effect transistor switches; inductance; millimetre wave devices; network topology; semiconductor-insulator boundaries; CMOS SOI; CMOS nodes; SPDT switches; double-shunt SPST switch; frequency 140 GHz to 220 GHz; insertion loss; semiconductor-on-insulator CMOS technology; single-pole double-throw switches; single-pole single-throw switches; size 45 nm; transistor layout; transmit-receive switches; tuned-shunt topology; very low ground inductance; CMOS integrated circuits; CMOS technology; Inductance; Insertion loss; Loss measurement; Transistors; Transmission line measurements; 45 nm CMOS; millimeter-wave; single-pole single-throw (SPST);

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2012.2206017

Filename

6237552