A low-voltage topology for CMOS RF mixers

Author

Svelto, F. ; Conta, M. ; Della Torre, V. ; Castello, R.

Author_Institution

Dipt. di Ingegneria, Univ. di Bergamo, Dalmine, Italy

Volume

45

Issue

2

fYear

1999

fDate

5/1/1999 12:00:00 AM

Firstpage

299

Lastpage

309

Abstract

This paper presents a 0.5 μm CMOS mixer for RF applications. The core consists of a quad differential pair, with resistive degeneration, implemented with MOS transistors in the linear region. This topology proves to be suitable for low voltage, highly linear down-converters. Compared with a CMOS Gilbert cell, it features a better linearity with a lower supply voltage. The mixer is powered at 2 V supply and drains 3.8 mA; the IIP3 and the single side band NF are given respectively by 21 dBm and 24 dB. In terms of spurious free dynamic range, the present circuit compares favorably with other reported mixers, operated at low voltage, both in bipolar and CMOS technologies. This is true even though a significant contribution to the noise figure comes from the IF stage, due to the very low supply

Keywords

CMOS integrated circuits; cellular radio; differential amplifiers; mixers (circuits); network topology; transceivers; 0.5 micron; 2 V; 21 dB; 24 dB; 3.8 mA; CMOS Gilbert cell; CMOS RF mixers; CMOS technology; DCS-1800 mobile telephone standards; GSM standards; IF stage; IIP3; MOS transistors; RF transceivers; bipolar technology; linear down-converters; linear region; low-voltage topology; noise figure; quad differential pair; resistive degeneration; single side band NF; spurious free dynamic range; supply voltage; CMOS technology; Circuits; Dynamic range; Linearity; Low voltage; MOSFETs; Noise figure; Noise measurement; Radio frequency; Topology;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.793413

Filename

793413