DocumentCode :
1556881
Title :
Characterization of Border Trap Density With the Multifrequency Charge Pumping Technique in Dual-Layer Gate Oxide
Author :
Son, Younghwan ; Park, Sunyoung ; Kang, Taewook ; Oh, Byoungchan ; Shin, Hyungcheol
Author_Institution :
Inter-Univ. Semicond. Res. Center (ISRC), Seoul Nat. Univ., Seoul, South Korea
Volume :
58
Issue :
8
fYear :
2011
Firstpage :
2752
Lastpage :
2758
Abstract :
The multifrequency charge pumping (MFCP) experiments have been investigated by many research groups for the characterization of oxide traps in high-permittivity (high-κ ) dielectric metal-oxide-semiconductor field-effect transistor samples. In these previous studies, the duty cycle was changed for control of charging and discharging depths. In this paper, the spatial and energy distributions of border traps in the metal gate/high-κ dielectric/silicon dioxide (SiO2) interfacial layer stack structure were characterized as a three-dimensional (3-D) mesh profile by using the MFCP technique. The presented MFCP technique was based on the frequency of the gate pulse in conjunction with the tunneling model of trapped charges and was not the duty cycle. The methodological basis and the accurate model were introduced for the analysis of the measured MFCP data in dual-layer gate oxide. The low-frequency noise measurement and the MFCP technique were used for the analysis of the constant gate bias stress induced trap generation, and the 3-D mesh profile of generating trap density was presented. Moreover, the energy distribution of stress-induced traps was investigated within high-κ, SiO2, and high-κ/SiO2 interface.
Keywords :
MOSFET; charge pump circuits; electric noise measurement; hafnium compounds; high-k dielectric thin films; interface states; permittivity; semiconductor device measurement; silicon compounds; titanium compounds; tunnelling; MFCP experiment; TiN-HfO2-SiO2; border trap density characterization; charge trap; constant gate bias stress induced trap generation; discharging control; dual-layer gate oxide; duty cycle; energy distribution; gate pulse frequency; high-permittivity dielectric metal oxide semiconductor field effect transistor; low-frequency noise measurement; metal gate-high-k dielectric-silicon dioxide interfacial layer stack structure; multifrequency charge pumping technique; oxide traps; three-dimensional mesh profile; tunneling model; Dielectrics; Electron traps; Iterative closest point algorithm; Logic gates; Silicon; Stress; Tunneling; $hbox{HfO}_{2}$ ; Charge pumping (CP); High-$kappa$; oxide traps;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2011.2157931
Filename :
5887405
Link To Document :
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