A low-power single-chip MPEG2 (half-D1) video codec LSI for portable consumer-products applications

Author

Hamamato, Y. ; Taoka, M. ; Sugiyama, Y. ; Sugimoto, E. ; Urano, T.

Author_Institution

Sanyo Electr. Co. Ltd., Tokyo, Japan

Volume

45

Issue

3

fYear

1999

fDate

8/1/1999 12:00:00 AM

Firstpage

496

Lastpage

500

Abstract

We developed a low-power, low-cost, single-chip MPEG2 (half-D1) video codec LSI for portable consumer-products applications. We achieved this by limiting the functions, reducing the maximum processing image size, adopting an efficient search range for motion estimation, and supporting a field offset sub-sampling method. This LSI can encode and decode at 27 MHz with a power consumption of 0.5 W at 1.8 V

Keywords

CMOS digital integrated circuits; code standards; consumer electronics; digital signal processing chips; image sampling; large scale integration; motion estimation; telecommunication standards; video codecs; 0.5 W; 1.8 V; 27 MHz; CMOS technology; MPEG2 video codec LSI; efficient search range; field offset sub-sampling method; half-D1 video codec; image size; low-cost LSI; low-power single-chip LSI; motion estimation; portable consumer-products applications; power consumption; single-chip MPEG2 video codec; video coding; video decoding; Bit rate; Costs; Energy consumption; Large scale integration; Motion estimation; Pixel; Production; Transform coding; Video codecs; Video compression;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.793532

Filename

793532