DocumentCode
1557005
Title
A Novel Method for Reducing Metal Variation With Statistical Static Timing Analysis
Author
Foreman, Eric A. ; Habitz, Peter A. ; Cheng, Ming-C ; Visweswariah, Chandu
Author_Institution
Syst. & Technol. Group, IBM, Essex Junction, VT, USA
Volume
31
Issue
8
fYear
2012
Firstpage
1293
Lastpage
1297
Abstract
Process variation continues to increase with new technologies. With the advent of statistical static timing analysis (SSTA), multiple independent sources of variation can be modeled. This paper proposes a novel technique to reduce variability of metal process variation in SSTA. This novel method maximizes sensitivity cancellation to minimize variability. The developed methodology is simulated with SSTA in 65-nm technology and shows a reduction in variability.
Keywords
integrated circuit interconnections; statistical analysis; SSTA; metal interconnect variation; metal variation reduction; multiple independent sources; sensitivity cancellation; size 65 nm; statistical static timing analysis; Capacitance; Delay; Integrated circuit interconnections; Metals; Resistance; Sensitivity; Application-specific integrated circuits; semiconductor–metal interfaces; timing circuits; very large-scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2012.2190068
Filename
6238394
Link To Document