Title :
A 2.5-Mb/s GFSK 5.0-Mb/s 4-FSK automatically calibrated Σ-Δ frequency synthesizer
Author :
McMahill, Daniel R. ; Sodini, Charles G.
Author_Institution :
Maxim Integrated Products, Chelmsford, MA, USA
fDate :
1/1/2002 12:00:00 AM
Abstract :
This paper describes a new sigma-delta (Σ-Δ) frequency synthesizer for Gaussian frequency and minimum shift keying (GFSK/GMSK) modulation. The key innovation is an automatic calibration circuit which tunes the phase-locked loop (PLL) response to compensate for process tolerance and temperature variation. The availability of this new calibration method allows the use of precompensation techniques to achieve high data rate modulation without requiring factory calibration. The calibration method can be applied to GFSK/GMSK modulation and also M-ary FSK modulation. The PLL, including 1.8-GHz voltage controlled oscillator (VCO), Σ-Δ modulator, and automatic calibration circuit, has been implemented in a 0.6-μm BiCMOS integrated circuit. The test chip achieves 2.5 Mb/s using GFSK and 5.0 Mb/s using 4-FSK
Keywords :
BiCMOS integrated circuits; calibration; circuit tuning; compensation; frequency shift keying; frequency synthesizers; minimum shift keying; phase locked loops; sigma-delta modulation; voltage-controlled oscillators; 0.6 micron; 1.8 GHz; 2.5 Mbit/s; 4-FSK; 5.0 Mbit/s; BiCMOS integrated circuit; GFSK; GFSK/GMSK modulation; Gaussian frequency shift keying; Gaussian minimum shift keying; M-ary FSK modulation; automatic calibration circuit; circuit tuning; phase-locked loop; precompensation technique; sigma-delta frequency synthesizer; voltage controlled oscillator; Availability; Calibration; Delta-sigma modulation; Frequency shift keying; Frequency synthesizers; Phase locked loops; Technological innovation; Temperature; Tuned circuits; Voltage-controlled oscillators;
Journal_Title :
Solid-State Circuits, IEEE Journal of
