Title :
Skewed associativity improves program performance and enhances predictability
Author :
Bodin, François ; Seznec, André
Author_Institution :
IRISA, Rennes, France
fDate :
5/1/1997 12:00:00 AM
Abstract :
Performance tuning becomes harder as computer technology advances. One of the factors is the increasing complexity of memory hierarchies. Most modern machines now use at least one level of cache memory. To reduce execution stalls, cache misses must be very low. Software techniques used to improve locality have been developed for numerical codes, such as loop blocking and copying. Unfortunately, the behavior of direct mapped and set associative caches is still erratic when large data arrays are accessed. Execution time can vary drastically for the same loop kernel depending on uncontrolled factors such as array leading size. The only software method available to improve execution time stability is the copying of frequently used data, which is costly in execution time. Users are not usually cache organization experts. They are not aware of such phenomena and have no control over it. In this paper, we show that the recently proposed four-way skewed associative cache yields very stable execution times and good average miss ratios on blocked algorithms. As a result, execution time is faster and much more predictable than with conventional caches. It is therefore possible to use larger block sizes in blocked algorithms, which will further reduce blocking overhead costs
Keywords :
cache storage; content-addressable storage; performance evaluation; average miss ratios; blocked algorithms; cache memory; four-way skewed associative cache; loop blocking; performance tuning; program performance; skewed associativity; Application software; Cache memory; Costs; Degradation; Kernel; Stability;
Journal_Title :
Computers, IEEE Transactions on