Folded gate LDMOS transistor with low on-resistance and high transconductance

Author

Zhu, Yuanzheng ; Liang, Yung C. ; Xu, Shuming ; Foo, Pang-Dow ; Sin, Johnny K O

Author_Institution

Centre for Power Electron., Nat. Univ. of Singapore, Singapore

Volume

48

Issue

12

fYear

2001

fDate

12/1/2001 12:00:00 AM

Firstpage

2917

Lastpage

2928

Abstract

In this paper, a novel folded gate LDMOS transistor (FG-LDMOST) structure is proposed with the properties of low on-resistance and high transconductance. The FG structure is formed by adding a single trench process into the conventional LDMOS process. In this way, the channel density can be largely increased after the additional process. From the data by laboratory measurement, with the FG concept applied, the specific on-resistance of FG-LDMOS device is reduced by 45.66% compared to the conventional LDMOS structure with similar dimensions. At the same time, the transconductance value is improved by 64.09%. The capacitance and effective channel mobility for both FG-LDMOST and the counterpart are also measured and compared. The significance of the FG concept can also be applied in making CMOS and other MOS-gated devices in low to medium operating voltage ranges

Keywords

MOSFET; capacitance; carrier mobility; low-power electronics; capacitance; channel density; effective channel mobility; folded gate LDMOS transistor; low-voltage device; single trench process; specific on-resistance; transconductance; Capacitance measurement; Electron mobility; Helium; Laboratories; Medium voltage; Power integrated circuits; Silicon compounds; Surface resistance; Threshold voltage; Transconductance;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.974729

Filename

974729