DocumentCode
1557648
Title
A novel method to separately investigate program and erase degradation mechanisms in flash memory cells
Author
Tseng, Jermyn M Z ; Larsen, Bradley J. ; Xiao, Yang ; Erickson, Donald A.
Author_Institution
Atmel Corp., Colorado Springs, CO, USA
Volume
48
Issue
12
fYear
2001
fDate
12/1/2001 12:00:00 AM
Firstpage
2947
Lastpage
2951
Abstract
A novel method using a capacitor charging technique and a flash cell with access to the floating gate (FG) is developed to characterize the program and erase degradation independently without the effect of each other. The hole injection during the source-side Fowler-Nordheim (FN) erase is responsible for the erase degradation. The interface-state generation during channel hot electron (CHE) programming appears to be the dominant degradation mechanism. Unlike the conventional methods of applying a constant voltage stress on the FG transistor, the dynamic change of FG potential during program or erase cycles was taken into account in our method. As a result, the trapped oxide charge density and interface-state profile in the tunnel oxide are significantly different from those obtained by the conventional methods
Keywords
flash memories; hot carriers; interface states; tunnelling; capacitor charging; channel hot electron programming; endurance cycling; erase degradation; flash memory cell; floating gate; hole injection; interface state generation; program degradation; source-side Fowler-Nordheim erase; trapped oxide charge density; tunnel oxide; Bipolar transistors; Boron; Degradation; Electron mobility; Electron traps; Flash memory; Flash memory cells; Testing; Time measurement; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.974734
Filename
974734
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