Title :
Analysis of gate-lag phenomena in recessed-gate and buried-gate GaAs MESFETs
Author :
Wakabayashi, Akira ; Mitani, Yasutaka ; Horio, Kazushige
Author_Institution :
Fac. of Syst. Eng., Shibaura Inst. of Technol., Saitama, Japan
fDate :
1/1/2002 12:00:00 AM
Abstract :
Two-dimensional analysis of gate-lag phenomena in recessed-gate and buried-gate GaAs MESFETs is performed, and their dependence on the structural parameters and the off-state gate voltage VGoff is studied. It is shown that when VGoff is around the threshold voltage (pinchoff voltage) Vth, the gate-lag could be almost eliminated by introducing the buried-gate structure. However, it is suggested that large gate-lag might be seen when VGoff is much more negative than Vth
Keywords :
III-V semiconductors; Schottky gate field effect transistors; carrier density; gallium arsenide; semiconductor device models; surface states; GaAs; buried-gate MESFET; electron density profiles; gate-lag phenomena; off-state gate voltage; physical models; recessed-gate MESFET; structural parameters; surface state; threshold voltage; two-dimensional simulation; Circuit simulation; Energy states; Gallium arsenide; Helium; MESFETs; Modeling; Performance analysis; Structural engineering; Surface treatment; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
