Reducing the power consumption in high-speed ΣΔ bandpass modulators

Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which efficiently implement a number of analog functions. Among them, SC EA modulators are very popular for analog-to-digital conversion. In this kind of circuit, operational amplifiers are the most consuming cells because of their requirements in terms of dc-gain and unity-gain frequency. An operational amplifier with 90 dB de-gain and a unity-gain frequency of 250 MHz is presented. The large power consumption (18 mW) could make critical its use in commercial applications, in particular for portable devices. However, combining this cell with a fast adaptive biasing circuit, high performance may be achieved with a 40% power consumption reduction. This approach has been used in the design of a sixth-order bandpass ΣΔ modulator suitable for the conversion at intermediate frequency (10.7 MHz) of the FM radio signal. A comparison with a structure without the proposed solution demonstrates that the modulator performance are not degraded by the proposed technique.