DocumentCode
1558187
Title
Junction temperature considerations in evaluating electronic parts for use outside manufacturers-specified temperature ranges
Author
Condra, Lloyd ; Das, Diganta ; Pendsé, Neeraj ; Pecht, Michael G.
Author_Institution
Boeing Commercial Airplanes, Seattle, WA, USA
Volume
24
Issue
4
fYear
2001
fDate
12/1/2001 12:00:00 AM
Firstpage
721
Lastpage
728
Abstract
When assessing the suitability of active electronic parts for use over a temperature range outside the manufacturer specified range, some manufacturers use a limiting value of junction temperature to define the maximum allowable thermal stress applied to the die. This process of thermal uprating based on junction temperature includes the following steps: (1) the maximum junction temperature limit is defined (obtained directly from the part data sheet, is calculated from other parameters listed on the part data sheet, or is decided by the equipment manufacturers design practices); (2) a margin is subtracted from the maximum junction temperature limit thus defining the maximum design value; (3) the maximum operating part junction temperature is computed for the given application; (4) the maximum operating part junction temperature is compared with the maximum design value. This approach to junction temperature based thermal uprating is appealing, because it offers the opportunity to avoid expensive and time-consuming part level electrical tests; however, the process may be more complicated than it appears. This paper discusses some of the limitations in the data available on data sheets and some of the uncertainties in the calculations and shows that calculated results do not always agree with experimental results. There is a possibility of error in each of the above steps; the major error may lie in the fact that the device manufacturer has also calculated the junction temperature from an assumed application configuration that may give a gross error in localized dissipation in the actual application. Results of a case study of the Fairchild Octal Tri-state buffer MM74HC244N are reported. Recommendations are then made for applying the junction temperature based thermal uprating process in the future
Keywords
integrated circuit packaging; integrated circuit reliability; product liability; thermal management (packaging); thermal resistance; thermal stresses; Fairchild Octal tri-state buffer; active electronic parts; high-speed CMOS tri-state buffer; high-to-low level propagation delay; limiting junction temperature value; localized dissipation; maximum allowable thermal stress; maximum operating part; maximum power ratings; outside manufacturer specified range use; part rating; parts selection; product liability responsibility; thermal resistance; thermal uprating; uncertainties; Aerospace industry; Defense industry; Electronic equipment manufacture; Manufacturing industries; Manufacturing processes; Semiconductor device manufacture; Temperature distribution; Thermal management; Thermal resistance; Thermal stresses;
fLanguage
English
Journal_Title
Components and Packaging Technologies, IEEE Transactions on
Publisher
ieee
ISSN
1521-3331
Type
jour
DOI
10.1109/6144.974966
Filename
974966
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