An analysis methodology to identify dominant noise sources in D/A and A/D converters

The authors describe a methodology by which noise sources in converters can be modeled using SPICE. Two converter topologies were used to illustrate the noise analysis methodology. SPICE input files constitute a noise model of a particular converter topology whose noise parameters may be changed to match actual converter noise behavior more closely. SPICE simulations are used to verify the analytical results and to examine typical noise levels in all of the circuits. The SPICE noise models allow easy identification of dominant noise sources within a given topology for a given set of noise parameters. The effects of changing the parameters of the dominant noise sources (e.g., using components designed for low noise) are examined to address design implications of the noise analysis. The effects of all noise sources on an analog-to-digital-to-analog converter system are examined