Parallel resonant DC link circuit-a novel zero switching loss topology with minimum voltage stresses

A parallel resonant DC link (PRDCL) circuit topology is proposed as an approach to realizing zero switching loss DC-AC high switching frequency power conversion. The proposed circuit is used as an interface between the DC voltage supply and a voltage source pulse width modulated (PWM) inverter to provide a short zero voltage period in the DC link of the inverter to allow zero voltage switchings to take place in the PWM inverter. The peak voltage stress on the PWM inverter switches is limited to the DC supply voltage. Another significant advantage of the circuit is that the inverter can be controlled by the conventional PWM strategy. The proposed circuit is systematically analyzed and its operation principle is explained. Design considerations and design formulas are presented. A complete zero voltage switching DC-AC system consisting of the proposed circuit and a PWM inverter was simulated on a computer