DocumentCode
1559177
Title
Defect size distribution in VLSI chips
Author
Glang, Reinhard
Author_Institution
IBM Corp., Manassas, VA, USA
Volume
4
Issue
4
fYear
1991
fDate
11/1/1991 12:00:00 AM
Firstpage
265
Lastpage
269
Abstract
Very large scale integration (VLSI) patterns consisting of parallel lines of polycrystalline Si have been fabricated and electrically tested for shorts. The number of observed shorts was related to the line spacings by using an analytical model for defect-sensitive pattern areas. It was found that the simple defect size distribution function h (x )=k ×x -n used previously with values of n around three, projects that total number of shorts arising from a given defect density with reasonable accuracy. However, actual defect size distributions observed microscopically are bimodal or multimodal. This complication has only a minor influence on the results projected by the model because the smaller defects are more numerous than the larger ones that make up the secondary distributions
Keywords
VLSI; electrical faults; integrated circuit testing; semiconductor device models; VLSI chips; analytical model; defect induced shorts; defect size distribution; defect-sensitive pattern areas; line spacings; polycrystalline Si; Analytical models; Distribution functions; Etching; Helium; Large scale integration; Mathematical model; Microscopy; Silicon; Testing; Very large scale integration;
fLanguage
English
Journal_Title
Semiconductor Manufacturing, IEEE Transactions on
Publisher
ieee
ISSN
0894-6507
Type
jour
DOI
10.1109/66.97808
Filename
97808
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