Title :
Shortest path search using tiles and piecewise linear cost propagation
Author :
Zhaoyun Xing ; Kao, R.
Author_Institution :
Sun Microsystems Labs., Palo Alto, CA, USA
Abstract :
In this paper we propose a new algorithm for finding shortest paths in a tile connection graph. This algorithm uses an exact piecewise linear cost model to guide our search of the compact tile graph. Unlike previous tile search algorithms, this algorithm always rinds a shortest path. Unlike the grid graph algorithms (which do find shortest paths), this algorithm searches the tile graph which is much smaller than the grid graph. The efficiency of our new approach is confirmed by our experiments comparing our new algorithm with the grid graph algorithms.
Keywords :
VLSI; circuit layout CAD; convolution; graph theory; integrated circuit layout; network routing; piecewise linear techniques; search problems; IC routing; VLSI layout; compact tile graph; design automation; piecewise linear approximation; piecewise linear cost propagation; shortest path search; tile connection graph; tile search algorithms; Automation; Costs; Grid computing; Piecewise linear approximation; Piecewise linear techniques; Probes; Routing; Search methods; Very large scale integration;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on