A new punch-through IGBT having a new n-buffer layer

Author

Iwamoto, Hideo ; Haruguchi, Hideki ; Tomomatsu, Yoshifumi ; Donlon, John F. ; Motto, Eric R.

Author_Institution

Mitsubishi Electr. Corp., Fukuoka, Japan

Volume

38

Issue

1

fYear

2002

Firstpage

168

Lastpage

174

Abstract

Insulated gate bipolar transistors (IGBTs) based on the non-punch-through (NPT) design approach exhibit excellent safe operating area (SOA) and short-circuit endurance, a positive temperature coefficient of on-state voltage over the operating current range, and low silicon cost. These merits have supported the development and commercialization of NPT IGBTs above the 1200-V class. However, the need for quite thin silicon to obtain competitive on-state losses at 1200-V and below classes has hindered the use of the NPT approach in this area. A new punch-through (PT) IGBT has been developed which exhibits the merits of the NPT approach, rugged SOA and short-circuit endurance, while also having a better tradeoff relation between on-state voltage and turn-off loss than either existing NPT or third-generation PT IGBTs

Keywords

bipolar transistor switches; insulated gate bipolar transistors; losses; power bipolar transistors; power semiconductor switches; 1200 V; insulated gate bipolar transistors; n-buffer layer; on-state losses; on-state voltage; positive temperature coefficient; punch-through IGBT; safe operating area; short-circuit endurance; Bipolar transistors; Breakdown voltage; Commercialization; Costs; Industry Applications Society; Insulated gate bipolar transistors; Leakage current; Semiconductor optical amplifiers; Silicon; Temperature distribution;

fLanguage

English

Journal_Title

Industry Applications, IEEE Transactions on

Publisher

ieee

ISSN

0093-9994

Type

jour

DOI

10.1109/28.980372

Filename

980372