A fixed-point MPEG audio processor operating at low frequency

Author

Yi, Yongseok ; Park, In-Cheol

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., KAIST, Taejon, South Korea

Volume

47

Issue

4

fYear

2001

fDate

11/1/2001 12:00:00 AM

Firstpage

779

Lastpage

786

Abstract

A fixed-point pipelined processor optimized for decoding MPEG-1 audio layer III (MP3) is presented. Various examination and experiments on the decoding algorithm are exploited to lower the operating frequency by providing efficient instructions and addressing modes, because low frequency is directly related to low power consumption. Accordingly, the dynamic scaling method is used to preserve the precision while computing in fixed-point arithmetic. Also, a novel instruction set tuned for MP3 decoding is presented. The resulting cycle count required to decode a frame is so small that the proposed processor can operate with 12.8 MHz while decoding in real-time

Keywords

CMOS digital integrated circuits; audio signal processing; circuit optimisation; decoding; digital signal processing chips; fixed point arithmetic; instruction sets; integrated circuit layout; pipeline processing; 12.8 MHz; MP3 decoding; MPEG-1 audio layer III; addressing modes; cycle count; decoding; dynamic scaling method; fixed-point MPEG audio processor; fixed-point pipelined processor; instruction set; operating frequency; power consumption; Analog-digital conversion; Circuits; Decoding; Digital audio players; Digital signal processing chips; Energy consumption; Fixed-point arithmetic; Frequency; Hardware; Signal processing algorithms;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.982789

Filename

982789