DocumentCode
15611
Title
A 3.6-to-1.8-V Cascode Buck Converter With a Stacked 
Filter in 65-nm CMOS
Author
Ostman, Kim B. ; Jarvenhaara, Jani K. ; Broussev, Svetozar S. ; Viitaniemi, Ismo
Author_Institution
Dept. of Electr. & Commun. Eng., Tampere Univ. of Technol., Tampere, Finland
Volume
61
Issue
4
fYear
2014
fDate
Apr-14
Firstpage
234
Lastpage
238
Abstract
This brief presents the analysis, design, and measurements of an integrated synchronous cascode dc-dc buck converter in 65-nm CMOS. Guidelines for optimal design of each thick-oxide device in the switch bridge are derived in order to obtain enhanced power efficiency. The form factor is improved by stacking the high-Q inductor and other converter components. The circuit shows a measured efficiency of 67.9% when converting 3.6 to 1.8 V at a switching frequency of 120 MHz and a load current of 140 mA. The efficiency enhancement factor of +26.4% is among the highest for integrated buck converters.
Keywords
CMOS integrated circuits; DC-DC power convertors; LC circuits; bridge circuits; filters; inductors; network analysis; optimisation; switched networks; CMOS; current 140 mA; form factor; frequency 120 MHz; high-Q inductor; integrated synchronous cascode dc-dc buck converter; load current; power efficiency; size 65 nm; stacked LC filter; switch bridge; switching frequency; thick-oxide device; voltage 3.6 V to 1.8 V; CMOS integrated circuits; Inductors; Logic gates; Semiconductor device measurement; Stacking; Switches; System-on-chip; Buck; cascode; circuit optimization; component stacking; dc–dc; dc??dc; device design; high $Q$; high Q; power supply on chip;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2014.2304875
Filename
6754149
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