Electrical design and specification challenges for high speed serial links

Author

Cases, M. ; de Araujo, D.N. ; Matoglu, E.

Author_Institution

IBM Corp., Austin, TX

Volume

1

fYear

2005

Abstract

This paper describes the electrical design, packaging and specification challenges for high speed serial link interfaces utilizing clock data recovery and encoding protocols. Major design and modeling issues are discussed, such as attenuation, crosstalk, simultaneous switching, impedance control and intersymbol interference. Channel specification and characterization are important aspects of the total link design. A methodology for describing a compliant channel is presented based on impulse response and S-parameter techniques

Keywords

S-parameters; channel estimation; crosstalk; electronics packaging; encoding; intersymbol interference; protocols; synchronisation; telecommunication links; S-parameter techniques; attenuation; channel specification; clock data recovery; crosstalk; electrical design; electrical packaging; electrical specification; encoding protocols; high speed serial links; impedance control; impulse response; intersymbol interference; simultaneous switching; Clocks; Crosstalk; Decision feedback equalizers; Design optimization; Dielectric losses; Digital communication; Integrated circuit interconnections; Jitter; Signal design; Transmitters;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Packaging Technology Conference, 2005. EPTC 2005. Proceedings of 7th

Conference_Location

Singapore

Print_ISBN

0-7803-9578-6

Type

conf

DOI

10.1109/EPTC.2005.1614362

Filename

1614362